GATE EE 2015 Digital Electronics Q 6 - Grad Plus
GATE EE 2015 Digital Electronics Q 6

GATE EE 2015 Digital Electronics Q 6

In the following sequential circuit, the initial state (before the first clock pulse) of the circuit is Q1Q0=00. The state (Q1Q0), immediately after the 333rd clock pulse is

a) 00

b) 01

c) 10

d) 11

Ans: (b)

Explanation

We have, J_0=Q_{1}^{'},\;\;K_0=Q_1

J_1=Q_0,\;K_1=Q_{0}^{'}

So, the state diagram is

At every 4n clock the system is at 00. So, at 332 it will be at 00.

And at 333rd clock it will be at 01.

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