BSc.-Digital Electronics-Mumbai-April 2018 - Grad Plus

# BSc.-Digital Electronics-Mumbai-April 2018

## Sem : 1

(2½ Hours)
[Total Marks: 75]
N. B.: (1) All questions are compulsory.
(2) Make suitable assumptions wherever necessary and state the assumptions made.
(3) Answers to the same question must be written together.
(4) Numbers to the right indicate marks.
(5) Draw neat labeled diagrams wherever necessary.
(6) Use of Non-programmable calculators is allowed.
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Q. 1 Attempt any three of the following: (15M)

a)Convert:
i) (23)10 = (?) 2 (2M)
ii) (34)16 = (?)10 (1M)
iii) (555)8 = (?)2 (1M)

b) Convert :
i) (101100)2 = (?)gray (2M)
ii) (456)10 = (?)bcd (2M)
iii) (64)10 = ( )excess 3 (1M)

c) Write a short note on different techniques of binary subtractions. (5M)

d) Solve :
i) (1011011)2 – (10010)2 = (?)2 (2M)
ii) (101101)2 + (11001)2 = (?)2 (3M)

e) Solve :
i) (67) 8 + (70)8 = (?) (3M)
ii) ( 331)8= ( ) 2 = (?) 16 (2M)

f)Solve :

i) ( ABC)16 + ( 89)16 = (?) 16 (3M)
ii) (FA) 16– (45)16= (?)16 (2M)

Q. 2 Attempt any three of the following: (15M)

a) Describe the AND gate and the XOR gate with the symbol, the logical statement, the boolean expression, and its logical circuit diagram.

b) State and proof DeMorgans Law.

c) Solve the following
i) Simplify :

\left ( \overline{A+B} \right )\; *\left ( \overline{A}+B \right )\; *\left ( \overline{B}+B \right )

ii) Simplify : (A + C)(AD + AD) + AC + C

d) Describe how NAND gate is used to build the NOT, OR, and AND gates

e) Derive the SOP of the following expression using K- Maps and draw the logical diagram F(W,X,Y,Z) = Ʃm( 0,2,5,8,10,13)

f) Derive the POS of the following expression using K- Maps and draw the logical diagram F(A, B, C, D) = Π M(0.2.3.4,8,12)
F(A,B,C,D) = Π M(0.2.3.4,8,12)

Q. 3 Attempt any three of the following:   (15M)

a) What is a combinational circuit? Build a combination circuit of a half adder.

b) With the help of K-Maps build a 3- bit full adder and describe it working.

c) Describe the working of 2 bit half subtractor.

d) Describe the working of an4 bit adder subtractor with a tristate inverter

e)Describe the working of a multiplier

f) What is a Comparator? Explain.

Q. 4. Attempt any three of the following: (15M)

a) Draw the logical circuit diagram and describe the working of a 4:1 multiplexer

b) Draw the logical circuit diagram and describe the working 1: 4 demultiplexer

c) Differentiate between encoders and decoders

d) Describe with a truth table the working of Clocked Set – Reset flip flop.

e) Describe with a truth table the working of JK flip flop.

f)  What is race-around condition? How can it be handled?

Q. 5.Attempt any three of the following: (15M)

a. Write a short note on type of counters.

b. Draw a logical diagram and describe the working of 4 bit binary counter.

c. Describe the functioning of a presettable counter

d. Write a short note on shift registers.

e.Describe with a timing diagram the working of a 4-bit ring counter.

f. What is the function of a pseudo-random binary sequence generator

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