PROCESSOR ARCHITECTURE AND INTERFACING-Engineering-Nov2019
S.E. (IT) (II Semester) EXAMINATION, 2019
PROCESSOR ARCHITECTURE AND INTERFACING (2015 PATTERN)
Time : Two Hours Maximum Marks : 50
N.B. :— (i) Answer Q. No. 1 Or Q. No. 2, Q. No. 3 or Q. No. 4, Q. No. 5 Or Q. No. 6, Q. No. 7 or Q. No. 8.
(ii) Neat diagrams must be drawn wherever necessary.
(iii) Figure to the right indicate full marks.
(iv) Assume suitable data, if necessary.
1. (A) Explain with diagram the logical to linear address translation mechanism of 80386 microprocessor. [7]
(B) What are assembler directives ? Explain any two directives used in 80386 programming. [5]
Or
2. (A) Differentiate between Near and Far Procedure. [4]
(B) State any four features of 80386 micrprocessor. [2]
(C) Explain non-pipelined bus cycle for READ operation with neat diagram. [6]
3. (A) Explain any three addressing modes of 8051 microcontroller with one example. [6]
(B) Draw and explain support registers CR0 – CR3 of paging operation of 80386 microprocessor. [6]
Or
4. (A) Explain fault, trap and abort. [6]
(B) What is the significance of the following pins of 8051 microcontroller ? [6]
(i) PSEN# (ii) ALE (iii) EA#.
5. (A) List operating modes of Timer of 8051 and explain any two of them. [7]
(B) Explain vectored interrupts available in 8051 with diagram, their vectored addresses and their priority. [6]
Or
6. (A) Explain significance of TMOD and TCON registers. [7]
(B) Explain any three of the following : [6]
TB8 RB8 TI RI REN
7. (A) Explain external memory of size 64 kB (both program and data) interfacting with 8051. [6]
(B) Draw interfacing diagram of DAC with 8051. Write ALP to generate triangle wave. [7]
Or
8. (A) Explain ADC interfacing with 8051. Explain significance of any two interfacing control signals. [6]
(B) Draw and explain I/O mode and BSR mode control word formats of PPI 8255. [7]