LinkedIn Insight Summer 2016 - Q.1 - Grad Plus

Summer 2016 – Q.1

1. (a) Draw and Explain full wave rectifier with capacitor filter.[6M]

i) A center tapped full wave rectifier with a filter made up of capacitor and resistor is explained. The filter made up of capacitor and resistor is known as capacitor filter.
ii) In the circuit diagram, the capacitor C is placed across the load resistor RL.

iii) The working of the full wave rectifier with filter is almost similar to that of the half wave rectifier with filter. The only difference is that in the half wave rectifier only one half cycle (either positive or negative) of the input AC current will charge the capacitor but the remaining half cycle will not charge the capacitor. But in full wave rectifier, both positive and negative half cycles of the input AC current will charge the capacitor.
iv) The main duty of the capacitor filter is to short the ripples to the ground and blocks the pure DC (DC components), so that it flows through the alternate path and reaches output load resistor RL.
v) When input AC voltage is applied, during the positive half cycle, the diode D1 is forward biased and allows electric current whereas the diode D2 is reverse biased and blocks electric current. On the other hand, during the negative half cycle the diode D2 is forward biased (allows electric current) and the diode D2 is reverse biased (blocks electric current).
vi) During the positive half cycle, the diode (D1) current reaches the filter and charges the capacitor. However, the charging of the capacitor happens only when the applied AC voltage is greater than the capacitor voltage.
vii) Initially, the capacitor is uncharged. That means no voltage exists between the plates of the capacitor. So when the voltage is turned on, the charging of the capacitor happens immediately.
viii) During this conduction period, the capacitor charges to the maximum value of the input supply voltage. The capacitor stores a maximum charge exactly at the quarter positive half cycle in the waveform. At this point, the supply voltage is equal to the capacitor voltage.


ix) When the AC voltage starts decreasing and becomes less than the capacitor voltage, then the capacitor starts slowly discharging.
x) The discharging of the capacitor is very slow as compared to the charging of the capacitor. So the capacitor does not get enough time to completely discharged. Before the complete discharge of the capacitor happens, the charging again takes place. So only half or more than half of the capacitor charge get discharged.
xi) When the input AC supply voltage reaches the negative half cycle, the diode D1 is reverse biased (blocks electric current) whereas the diode D2 is forward biased (allows electric current).
xii) During the negative half cycle, the diode (D2) current reaches the filter and charges the capacitor. However, the charging of the capacitor happens only when the applied AC voltage is greater than the capacitor voltage.
xiii) The capacitor is not completely uncharged, so the charging of the capacitor does not happens immediately. When the supply voltage becomes greater than the capacitor voltage, the capacitor again starts charging.
xiv) In both positive and negative half cycles, the current flows in the same direction across the load resistor RL. So we get either complete positive half cycles or negative half cycles. In our case, they are complete positive half cycles.


(b) Explain CE amplifier with the help of DC loadline. [6M]

i) Let us consider a CE amplifier circuit shown in figure.

CE amplifierii) An AC signal is fed at the input terminal (i.e. between base and emitter) while the AC output is taken between the collector and ground.
iii) Resistance Rc is the output resistance while R1 and R2 are biasing resistors.
iv) The output voltage is given by  the expression
$latex V_{CE}=V_{CC}-I_CR_C.$
v) When ac signal voltage increases in the positive half cycle, this increases the bias potential for emitter junction which in turn increases the base current.
vi) This results in increase in collector current $latex \left(i_c=\beta i_b\right)$ and hence the voltage drop iC RC also increases. Since VCC is constant , the output voltage VCE decreases.
vii) In other words. it can be stated that when signal voltage (Vin) increases in the positive half cycle, the output voltage (Vout) increases in the negative half cycle, this clearly shows that the output voltage is 180° out of phase to that of input voltage. This is called phase reversal.
viii) The output characteristics of a transistor are shown in figure. On which a line AB is drawn.
ix) In the absence of input signal, only dc voltage are present in the circuit. This is known as zero signal or no-signal condition or quiescent condition for amplifier.
x) The dc collector emitter voltage VCE, the dc collector current IC and dc base current IB is the quiescent operating point for this amplifier.
xi) On this de quiescent of ac sinusoidal voltage Vo the input due to this, base current varies sinusoidally.

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