Summer 2017 - Q.2 - Grad Plus

Summer 2017 – Q.2

2. (a) In a centre tapped FWR, the rms half secondary voltage  is 10 V. Assuming ideal diodes and load resistance of 2 kΩ, find DC load current, ripple factor and efficiency of rectification. [6M]

Given:- Centre tapped FWR
Vrms= 10 V ; RL= 2 kΩ

i) Im = $latex \frac{V_m}{R_L}$
$latex V_m=\sqrt2\;V_{rms}=14.14\;V$

$latex I_m=\frac{14.14}2=7.07\;mA\;\;\;\;\;\leftarrow\left(peak\;current\right)$

$latex I_{dc}=\frac{2I_m}\pi=\frac{2\times7.07}\pi=4.5\;mA.$

ii) Ripple factor = $latex \sqrt{\left(\frac{I_{rms}}{I_{oc}}\right)^2-1}$
$latex I_{rms}=\frac{I_m}{\sqrt2}=\frac{7.07}{\sqrt2}=4.99\;mA.$

Ripple factor = $latex \sqrt{\left(\frac{4.99}{4.5}\right)^2-1}$
Ripple factor = 0.4839

iii) Efficiency of rectification:-(η)
$latex \begin{array}{l}P_{DC}=\;I_{DC}^2\;\cdot R_L\\\\\;\;\;\;\;\;\;=4.5^2\times2\times10^3\\\\\;\;\;\;\;\;\;=40.5\;mW\\\\\end{array}$

$latex \begin{array}{l}P_{AC}=\;I_{rms}^2\;\cdot R_L\\\\\;\;\;\;\;\;\;=4.99^2\times2\times10^3\\\\\;\;\;\;\;\;\;=49.8\;mW\end{array}$

$latex \begin{array}{l}\%\eta\;=\;\frac{P_{DC}}{P_{AC}}\times100\\\\\;\;\;\;\;\;\;=\frac{40.5}{49.8}\times100\\\\\;\boxed{\%\eta=81.32\%}\\\end{array}$

(b) Draw and explain drain and transfer, characteristics of enhancement type P-channel MOSFET. [6M]

i) Following figure shows the drain characteristics of p-channel enhancement type MOSFET.

drain characteristics p channel MOSFET

ii) If no voltage is applied to the gate terminal (i.e.VGS=0) we can say that there are two back to back diodes between source and drain region. Thus current flowing is zero even if VDS is applied.

p channel MOSFET

iii) Now if we increase the VGS in negative direction, the concentration of holes near the SiO2 surface i.e. between source and drain starts increasing. This is known as induced p-channel.
iv) At particular value of VGS, there are a sufficient number holes get induced to form conducting channel and there is a measurable current flow between drain and source. This value of VGS is called as threshold voltage denoted as VT. The value of VT is negative for p-channel MOSFET.
v) Drain characteristics for n channel enhancement type MOSFET is shown in the figure. It clearly indicates that current ID is zero for |VGS|<|VT|. The region is known as cut-off region.
vi) Consider any constant value of VGS and assume that VDS is increasing in negative direction from 0V. For small values of VDS current ID increases linearly with increase in the voltage VDS. This region is known as ohmic region.
vii) As VDS is further increased(in negative direction), the channel starts tapering at drain end because of voltage drop across the length of channel. The current ID no longer increases linearly. At particular value of VDS, channel becomes pinched-off at drain end and current remains constant for further increase in VDS. i.e. becomes saturated. This region is known as saturation region.
viii) Transfer characteristics is shown below.

Transfer characteristics p channel MOSFET

ix) Transfer characteristics is a relation between ID and VGS for constant is shown in the figure. For PMOS device it is in the negative VGS region and the current ID is zero till VGS=VT.
x) For the | VGS |>| VT |, i.e. more negative than threshold voltage, relation between drain current ID and VGS is given by following non-linear relation:

ID=k (VGS-VT)2
where k is constant and function of the geometry of the device.

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