Summer 2018- Q.11 solution
Q.11) a) Explain addressing modes of 8051. [8M]
Solution:- An Addressing Mode is a way to locate a target Data, which is also called as Operand. The 8051 Family of Microcontrollers allows five types of Addressing Modes for addressing the Operands. They are:
- Immediate Addressing
- Register Addressing
- Direct Addressing
- Register – Indirect Addressing
- Indexed Addressing
Immediate Addressing
In Immediate Addressing mode, the operand, which follows the Opcode, is a constant data of either 8 or 16 bits. The name Immediate Addressing came from the fact that the constant data to be stored in the memory immediately follows the Opcode.
The constant value to be stored is specified in the instruction itself rather than taking from a register. The destination register to which the constant data must be copied should be the same size as the operand mentioned in the instruction.
Example: MOV A, #030H
Here, the Accumulator is loaded with 30 (hexadecimal). The # in the operand indicates that it is a data and not the address of a Register.
Immediate Addressing is very fast as the data to be loaded is given in the instruction itself.
Register Addressing
In the 8051 Microcontroller Memory Organization Tutorial, we have seen the organization of RAM and four banks of Working Registers with eight Registers in each bank.
In Register Addressing mode, one of the eight registers (R0 – R7) is specified as Operand in the Instruction.
It is important to select the appropriate Bank with the help of PSW Register. Let us see a example of Register Addressing assuming that Bank0 is selected.
Example: MOV A, R5
Here, the 8-bit content of the Register R5 of Bank0 is moved to the Accumulator.
Direct Addressing
In Direct Addressing Mode, the address of the data is specified as the Operand in the instruction. Using Direct Addressing Mode, we can access any register or on-chip variable. This includes general purpose RAM, SFRs, I/O Ports, Control registers.
Example: MOV A, 47H
Here, the data in the RAM location 47H is moved to the Accumulator.
Register Indirect Addressing
In the Indirect Addressing Mode or Register Indirect Addressing Mode, the address of the Operand is specified as the content of a Register. This will be clearer with an example.
Example: MOV A, @R1
The @ symbol indicates that the addressing mode is indirect. If the contents of R1 is 56H, for example, then the operand is in the internal RAM location 56H. If the contents of the RAM location 56H is 24H, then 24H is moved into accumulator.
Only R0 and R1 are allowed in Indirect Addressing Mode. These register in the indirect addressing mode are called as Pointer registers.
Indexed Addressing Mode
With Indexed Addressing Mode, the effective address of the Operand is the sum of a base register and an offset register. The Base Register can be either Data Pointer (DPTR) or Program Counter (PC) while the Offset register is the Accumulator (A).
In Indexed Addressing Mode, only MOVC and JMP instructions can be used. Indexed Addressing Mode is useful when retrieving data from look-up tables.
Example: MOVC A, @A+DPTR
Here, the address for the operand is the sum of contents of DPTR and Accumulator.
Q.11) b) Explain any three of the following instructions of 8051. [6M]
i) MULAB ii) SWAP iii) MOVX A, DPTR iv) SETB P 1.5 v) DJNZ R 3, label vi) DAA
Solution:- i)MULAB:-
| Operation: | MUL |
| Function: | Multiply Accumulator by B |
| Syntax: | MUL AB |
| Instructions | OpCode | Bytes | Flags |
| MUL AB | 0xA4 | 1 | C, OV |
Description: Multiples the unsigned value of the Accumulator by the unsigned value of the “B” register. The least significant byte of the result is placed in the Accumulator and the most-significant-byte is placed in the “B” register.
The Carry Flag (C) is always cleared.
The Overflow Flag (OV) is set if the result is greater than 255 (if the most-significant byte is not zero), otherwise it is cleared.
ii) SWAP:-
| Operation: | SWAP |
| Function: | Swap Accumulator Nibbles |
| Syntax: | SWAP A |
| Instructions | OpCode | Bytes | Flags |
| SWAP A | 0xC4 | 1 | None |
Description: SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is identical to executing “RR A” or “RL A” four times.
iii) MOVX A, DPTR :-
| Operation: | MOVX |
| Function: | Move Data To/From External Memory (XRAM) |
| Syntax: | MOVX operand1,operand2 |
| Instructions | OpCode | Bytes | Flags |
| MOVX @DPTR,A | 0xF0 | 1 | None |
| MOVX @R0,A | 0xF2 | 1 | None |
| MOVX @R1,A | 0xF3 | 1 | None |
| MOVX A,@DPTR | 0xE0 | 1 | None |
| MOVX A,@R0 | 0xE2 | 1 | None |
| MOVX A,@R1 | 0xE3 | 1 | None |
Description: MOVX moves a byte to or from External Memory into or from the Accumulator.
If operand1 is @DPTR, the Accumulator is moved to the 16-bit External Memory address indicated by DPTR. This instruction uses both P0 (port 0) and P2 (port 2) to output the 16-bit address and data. If operand2 is DPTR then the byte is moved from External Memory into the Accumulator.
If operand1 is @R0 or @R1, the Accumulator is moved to the 8-bit External Memory address indicated by the specified Register. This instruction uses only P0 (port 0) to output the 8-bit address and data. P2 (port 2) is not affected. If operand2 is @R0 or @R1 then the byte is moved from External Memory into the Accumulator.
iv) SETB:-
| Operation: | SETB |
| Function: | Set Bit |
| Syntax: | SETB bit addr |
| Instructions | OpCode | Bytes | Flags |
| SETB C | 0xD3 | 1 | C |
| SETB bit addr | 0xD2 | 2 | None |
Description: Sets the specified bit.
v) DJNZ R3, LABEL :-
| Operation: | DJNZ |
| Function: | Decrement and Jump if Not Zero |
| Syntax: | DJNZ register,reladdr |
| Instructions | OpCode | Bytes | Flags |
| DJNZ iram addr,reladdr | 0xD5 | 3 | None |
| DJNZ R0,reladdr | 0xD8 | 2 | None |
| DJNZ R1,reladdr | 0xD9 | 2 | None |
| DJNZ R2,reladdr | 0xDA | 2 | None |
| DJNZ R3,reladdr | 0xDB | 2 | None |
| DJNZ R4,reladdr | 0xDC | 2 | None |
| DJNZ R5,reladdr | 0xDD | 2 | None |
| DJNZ R6,reladdr | 0xDE | 2 | None |
| DJNZ R7,reladdr | 0xDF | 2 | None |
Description: DJNZ decrements the value of register by 1. If the initial value of register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). If the new value of register is not 0 the program will branch to the address indicated by relative addr. If the new value of register is 0 program flow continues with the instruction following the DJNZ instruction.
vi) DAA:-
| Operation: | DA |
| Function: | Decimal Adjust Accumulator |
| Syntax: | DA A |
| Instructions | OpCode | Bytes | Flags |
| DA | 0xD4 | 1 | C |
Description: DA adjusts the contents of the Accumulator to correspond to a BCD (Binary Coded Decimal) number after two BCD numbers have been added by the ADD or ADDC instruction. If the carry bit is set or if the value of bits 0-3 exceed 9, 0x06 is added to the accumulator. If the carry bit was set when the instruction began, or if 0x06 was added to the accumulator in the first step, 0x60 is added to the accumulator.
The Carry bit (C) is set if the resulting value is greater than 0x99, otherwise it is cleared.