Questions 51 to 60 Solutions

Q.51. For the circuit shown, if ????=????????????1000????, the instantaneous value of the Thevenin’s equivalent voltage (in Volts) across the terminals a-b at time t = 5 ms is __ (Round off to 2 decimal places).

Ans. 11.98 V

Video Explanation:

Explanation :- Applying source transformation

Applying KVL,

10+j10 = (10+j10Iix-4ix+(10-j10)ix

i_{x}=\frac{10+j10}{16}

V_in = i_x (10-j10)

\frac{100+100}{16}=12.5 Volt

V_th = 12.5 sin 1000t

= 12.5 sin 1000 x 5 x 10^-3

V_th = -11.98 V

The Thevenin’s equivalent voltage is -11.98 V.

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Q.52. The admittance parameters of the passive-resistive two-port network shown in the figure are ????₁₁=5 ????,????₂₂=1 ????,????₁₂=????₂₁= −2.5 ????
The power delivered to the load resistor R_L in Watt is __ (Round off to 2 decimal places).

Ans. 238

Explanation :- Given :- Y= [Y]A + [Y]B

Y_{A}=\begin{bmatrix}1/3 & -1/3\\-1/3 & 1/3\end{bmatrix} Y_{B}=\begin{bmatrix}5 & -2.5\\-2.5 & 1\end{bmatrix}s Y=\begin{bmatrix}1/3 & -1/3\\-1/3 & 1/3\end{bmatrix}+\begin{bmatrix}5 & -2.5\\-2.5& 1\end{bmatrix} \begin{bmatrix}16/3 &-8.5/3 \\-8.3/3 & 4/3\end{bmatrix} I_{1}=\frac{16}{3}V_{1}-\frac{8.5}{3}V_{2} I_{2}=\frac{-8.5}{3}V_{1}-\frac{4}{3}V_{2}

Put I₂=0 and V₁=20 V

0=\frac{-8.5}{3}\times 20+\frac{4}{3}V_{2} V_{th}=V_{2}=\frac{8.5\times 20}{4}=42.5 V

R_th = V₂/I₂

I₂= 4/3 V₂

\frac{V_{2}}{I_{2}}=\frac{3}{4}\Omega

Equivalent circuit,

I=\frac{42.5}{\frac{3}{4}+6}=6.296 A

P=I²R RL = (6.296)₂ x 6 = 238 W

The power delivered to the load resistor R_L in Watt is 238 W.

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Q.53. When the winding c-d of the single-phase, 50 Hz, two winding transformer is supplied from an AC current source of frequency 50 Hz, the rated voltage of 200 V (rms), 50 Hz is obtained at the open-circuited terminals a-b. The cross-sectional area of the core is 5000 mm² and the average core length traversed by the mutual flux is 500 mm. The maximum allowable flux density in the core is Bmax = 1 Wb/m² and the relative permeability of the core material is 5000. The leakage impedance of the winding a-b and winding c-d at 50 Hz are (5 + j100π×0.16) Ω and (11.25 + j100π×0.36) Ω, respectively. Considering the magnetizing characteristics to be linear and neglecting core loss, the self-inductance of the winding a-b in millihenry is _ (Round off to 1 decimal place).

Ans. 2195.7

Video Explanation:

Explanation :- I= 500 mm = 0.5 m

A= 5000 mm² = 5 x 10^-3 m²

\mu _{r}=5000

E= 200 V

R=\frac{I}{\mu {o}\mu {r}A}=\frac{0.5}{4\pi \times 10^{-7}\times 5000\times 5\times 10^{-3}}= 15915.49

E=4.44 fNB_mA

N=\frac{E}{4.44fNB_{m}A}=\frac{200}{4.44\times 50\times 1\times 5\times 10^{-3}}= 181 L=\frac{N^2}S=\frac{180^2}{15915.49}=2.035H

Self Inductance of Coil = L + 0.16 = 2.1957 H = 2195.7 mH

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Q.54. The circuit shown in the figure is initially in the steady state with the switch K in open condition and ????̅ in closed condition. The switch K is closed and ????̅ is opened simultaneously at the instant t = t1, where t1 > 0. The minimum value of t1 in milliseconds, such that there is no transient in the voltage across the 100 \mu F capacitor, is __ (Round off to 2 decimal places).

Ans. 1.57

Explanation :- Let us assume two cases,

Case-I :- At t=0-, X_{c}=\frac{1}{\omega C}=\frac{1}{1000\times 100\times 10^{-6}}=10\; \Omega

V_{c}=1\angle 0^{o}\times \frac{10}{10-j10}\ast -j10 V_{c}= \frac{(10)(-j10)}{10-j10}\times \frac{(10+j10)}{10+j10}= 5-j5

Vc= 7.07 ∠-45^o

Vc(t) = 7.07 sin (1000t – 45^o)

Case-II :- At t=t₁

Vc(t) = 7.07 sin (1000t₁– 45^o)

Vc(∞) = 5 V , \tau =RC= 10 \times 100 \times 10^{-6}=10^{-3}

V_c(t) = 5 + (7.07 sin (1000t₁-45)-5)e^-t/10^-3

V_c(t) = 5 + (7.07 sin (1000t₁ -45)-5)e^-1000(t-t1)

1000t₁ -45 = 45^o

t₁ = 1.57 msec

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Q.55. The circuit shown in the figure has reached steady state with thyristor ‘T’ in OFF condition. Assume that the latching and holding currents of the thyristor are zero. The thyristor is turned ON at t = 0 sec. The duration in microseconds for which the thyristor would conduct, before it turns off, is _ (Round off to 2 decimal places).

Ans. 7.33

Explanation :- Let us consider two cases,

Case-I :-
Steady state condition before t =0 sec
The capacitor is charged already with supply voltage V_s = 100 V

Case-2 :
Now thyristor T is turned on

Mode- I : At starting Vc= 100 V ,the capacitor will discharge through LC circuit at the end,

t_{1}=\pi \sqrt{LC}sec

the capacitor voltage will become V_c = -100 V ( polarity is changed )

Mode-2 :-

The thyristor current , i_{Tm}=\frac{V_{s}}{R}-I_{\rho }\; sin\omega _{o}t

At the end, i_{o}=\frac{V_{s}}{R}-I_{\rho }\; sin\omega _{o}t

i_Tm= 0

So, \omega {o}t{2}=sin^{-1}\left ( \frac{I_{o}}{I_{p}} \right )

I {\rho }=V{s}\sqrt{\frac{C}{L}}=100\sqrt{\frac{1}{4}}= 50 A I_{o}=\frac{V_{s}}{R}=\frac{100}{4}=25 A

So, t_{2}=\sqrt{LC}sin^{-1}\left ( \frac{25}{50} \right )=\frac{\pi }{6}\sqrt{LC}

Therefore, total time for conduction , t₁+ t₂ = \pi \sqrt{LC}sec + \frac{\pi }{6}\sqrt{LC}

=\frac{7\pi }{6}\sqrt{1\times 10^{-6}\times 4\times 10^{-6}}=7.33\; \mu sec

The duration in microseconds for which the thyristor would conduct, before it turns off, is 7.33 sec.

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Q.56. Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic states, which will not change with clock, is __.

Ans. 8

Explanation :- Given diagram is,

From circuit, D1 = B ⊕ C = Q2 ⊕ Q1

D2 = Q1

Let Q2Q1 = 00

CLK	D2	D1	Q2	Q1
			0	0
	0	0	0	0

The sequence will become,

ABCD

\overline{Q_{2}}Q_{2}Q_{1}(Q_{1}\bigoplus Q_{2})

1000

The decimal equivalent of 1000 is (8)_10.

The correct answer is 8.

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Q.57. In a given 8-bit general purpose micro-controller there are following flags. C-Carry, A-Auxiliary Carry, O-Overflow flag, P-Parity (0 for even, 1 for odd) R₀ and R₁ are the two general purpose registers of the micro-controller. After execution of the following instructions, the decimal equivalent of the binary sequence of the flag pattern [CAOP] will be __.

MOV R0, +0X60

MOV R1,+0X46

ADD R0,R1

Ans. 2

Explanation :-

MOV R₀, +0X60 ; R_o ← 60 H

MOV R₁,+0X46 ; R₁ ← 46 H

ADD R₀,R₁ ; Ro ← [R_o] + [R₁]

D4	D3
0110	0000
0100	0110
1
1010	0110

60H + 46H = A6H, i.e., 10100110

Overflow (0)➝ 1

Since if the two 8-bit data were considered as signed data then the result shows negative, i.e., Msb = 1 in A6H but both data bytes are positive.
Parity (P) ➝ Even, as there are ‘four’ binary ‘I’s in result A6

P➝0

For Carry Flag (C➝ 0) No carry bit out of Mantisa.

For auxiliary carry (AC ➝ 0)

No carry from D₃ to D₄ bit.

[CAOP] ➝ [0010]₂ = (2)₁₀

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Q.58. The single phase rectifier consisting of three thyristors T1, T2, T3 and a diode D1 feed power to a 10 A constant current load. T₁ and T₃ are fired at α = 60° and T₂ is fired at α = 240°. The reference for α is the positive zero crossing of Vin. The average voltage VO across the load in volts is _ (Round off to 2 decimal places).

Ans. 39.78

Explanation :- The waveforms is given as,

The average output voltage is given as,

V_{o}=\frac{1}{2\pi }\left [ \int_{\alpha }^{\pi }V_{m}sin \omega t d(\omega t) +\int_{2\pi +\alpha }^{\pi +\alpha }-V_{m} sin \omega t d(\omega t)\right ] V_{o}=\frac{V_{m}}{2\pi }[1+3 cos\alpha ] V_{o}=\frac{100}{2\pi }[1+3 cos60^{o} ]

V_o = 39.78 V

The average output voltage is 39.78 V.

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Q.59. The Zener diode in circuit has a breakdown voltage of 5 V. The current gain β of the transistor in the active region in 99. Ignore base-emitter voltage drop VBE. The current through the 20 Ω resistance in milliamperes is __(Round off to 2 decimal places).

Ans. 250

Explanation :- Given that

Let us consider that zener diode is in off state , then the circuit diagram can be modified as,

Applying KVL we get ,

25 = 7k x I_B + I_E (10+20)Ω

25 = 7k x I_B + I(1+β)I_B (30)

25 = 7k x I_B + 3000 x I_B

25 = 7k x I_B + 3k I_B

25 = 10k x I_B

I_{B}=\frac{25}{10k}= 2.5 mA

IE=(1+β) I_B

= (1+99) x 2.5 = 100 x 2.5 mA = 250 mA

The current through 20 ohm resistance in mA is 250 mA.

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Q.60. The two-bus power system shown in figure (i) has one alternator supplying a synchronous motor load through a Y-Δ transformer. The positive, negative and zero-sequence diagrams of the system are shown in figures (ii), (iii) and (iv), respectively. All reactances in the sequence diagrams are in p.u. For a bolted line -to-line fault (fault impedance = zero) between phases ‘b’ and ‘c’ at bus 1, neglecting
all pre-fault currents, the magnitude of the fault current (from phase ‘b’ to ‘c’) in p.u. is _ (Round off to 2 decimal places).

Ans. 7.21

Explanation :- The (Z_1eq)_bus1 = j0.2 || j0.3 = \frac{j0.2\times 0.3}{0.5}=j0.12 pu

The (Z_2eq)_bus1 = j0.2 || j0.3 = j0.12 pu

The per phase equivalent circuit for LLG fault is given as, I_{af}=\frac{1\angle 0^{o}}{j0.12+j0.12}=4.16 pu

Therefore the fault current is given by, I_{f}=\sqrt{3}\times I_{af}= \sqrt{3}\times 4.16 = 7.21 pu

The magnitude of the fault current in p.u. is 7.21 pu

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