Q.31. The signal-to-noise ratio (SNR) of an ADC with a full-scale sinusoidal input is given to be 61.96 dB. The resolution of the ADC is __ bits (rounded off to the nearest integer).
Ans. 10
Explanation :- Signal-to-noise ratio (SNR) is a measure used to quantify the level of desired signal relative to the level of background noise or unwanted interference in a system. It is a ratio of the power or amplitude of the signal of interest to the power or amplitude of the noise.
For the sinusoidal input , the signal to noise ratio (SNR) is given as,
SNR = 1.76 + 6.02 n dB
61.96 dB = 1.76 +6.02 n dB
6.02 n = 61.96 – 1.76
n= 10 bits
The resolution of ADC is 10 bits.
Q.32. In the circuit shown below, the current i flowing through 200 Ω resistor is __ mA (rounded off to two decimal places).
Ans. 1.36
Video Explanation:
Explanation :- The given diagram is,
Applying source transformation,
Changing the current source into voltage source
By Nodal Analysis,
\frac{V_{a}-2}{2k\Omega }+\frac{V_{a}}{2k\Omega }+\frac{V_{a}+1}{1.2k\Omega }=1 \: mA V_{a}\left [ \frac{1}{2}+\frac{1}{2} +\frac{1}{1.2} \right ]= 1+\frac{2}{2}-\left ( \frac{1}{1.2} \right )=0.636 VVA= 0.636 V
The current through 200 Ω resistor is given by,
i=\frac{V_{A}+1}{1.2}=\frac{0.636+1}{1.2}=1.36 mAThe current flowing through the 200 ohm resistor is 1.36 mA
Q.33. For the two port network shown below, the [Y]-parameters is given as
[Y]=\frac{1}{100}\begin{bmatrix}2 & -1\\-1 & 4/3\end{bmatrix}SThe value of load impedance ZL, in Ω, for maximum power transfer will be _ (rounded off to the nearest integer).
Ans. 80
Explanation :- Given that [Y]=\frac{1}{100}\begin{bmatrix}2 & -1\\-1 & 4/3\end{bmatrix}S
For the given Y parameter the two port network will be
Y11= Ya+Yb= 2/100
Y12= Y21=-Yb = -\frac{1}{100}
Y22 = Yb + Yc = \frac{4}{300}
Solving these, we get
Yb= 1/100 s
Ya= 1/100 s
Yc= 1/300 s
The network becomes,
The Zth is given as,
ZTH = 60 + [(20+10)||60]
ZTH = 60+\frac{30\times 60}{30+60}= 80 \; \Omega
Now, for maximum power transfer ,
ZL=ZTh= 80 Ω
Q.34. For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is __ (rounded off to the nearest integer).
Ans. 2
Explanation :- In general, The critical path delay is the maximum amount of time it takes for a signal to propagate through the longest path in a circuit, from the input to the output.
The given circuit can be drawn as,
The critical path delay = 1ns+1ns = 2 ns
Q.35. In the circuit shown below, switch S was closed for a long time. If the switch is opened at ???? = 0, the maximum magnitude of the voltage VR, in volts, is _ (rounded off to the nearest integer).
Ans. 4
Explanation :- Let us consider two cases,
Case-I :- At t=0-
We will close the switch S, and inductance is deactivated,
The current in the inductance is given as iL
i_{L}(0^{-})=\frac{2}{1}=2 ACase-II :- At t=0+
The voltage is given as VR. This voltage is present behind the resistance.
VR = -2 x 2 = -4
Magnitude of Voltage VR.
|VR| = 4
The maximum magnitude of the voltage VR in volts is 4.
Q.36. A random variable X, distributed normally as ????(0,1), undergoes the transformation Y=h(X), given in the figure. The form of the probability density function of ???? is
(In the options given below, ????,????,???? are non-zero constants and ????(????) is piece-wise continuous function)
a) a\delta (y-1)+b\delta (y+1)+g(y)
b) a\delta (y+1)+b\delta (y)+c\delta (y-1)+g(y)
c) a\delta (y+2)+b\delta (y)+c\delta (y-2)+g(y)
d) a\delta (y+2)+b\delta (y-2)+g(y)
Ans. (b)
Explanation :- Given that X= N(0,1)
f_{x}(x)=\frac{1}{\sqrt{2\pi }}e^{-x^{2}/2}From the graph,
Y=-1; x ≤ -2
0 ; -1 ≤ x ≤ 1
1; x ≥ 2
x+1 ; -2 ≤ x ≤ -1
x-1 ; 1 ≤ x ≤ 2
Y is a mixed random variable as it is taking both the discrete set of values and a continuous range of values.
From the given options, the probability density function of ‘Y’ will be,
fy(y) = a\delta (y+1)+b\delta (y)+c\delta (y-1)+g(y)
Q.37. The value of line integral \int_{P}^{Q}(z^{2}dx+3y^{2}dy+2xzdz) along the straight line joining the points P(1,1,2) and Q(2,3,1) is
a) 20
b) 24
c) 29
d) -5
Ans. (b)
Explanation :- Given that , \int_{P}^{Q}(z^{2}dx+3y^{2}dy+2xzdz)
The line integral is joining the points P(1,1,2) and Q(2,3,1) is
= \int_{P(1,2)}^{P(2,1)}z^{2}dx+2xydz+\int_{y=1}^{3}3y^{2}dySolving the integration we get,
(xz^{2})^{(2,1)}_{(1,2)}+(y^{3})^{3}_{1}= (2 x 12 – 1 x 22) +(33-13)
= -2+26 = 24
The correct option is (b)
Q.38. Let ???? be an ????×1 real column vector with length l=\sqrt{x^{T}x} The trace of the matrix ????=???????????? is
a) l2
b) \frac{l^{2}}{4}
c) l
d) \frac{l^{2}}{2}
Ans. (a)
Explanation :- To determine the trace of the matrix P = xx^T, where x is an n×1 real column vector, we need to consider the definition of the trace and properties of matrix multiplication.
Given that, l=\sqrt{x^{T}x}, ????=????????????
Trace of (p) = Σ P(i,i) from i=1 to n
= Σ x(i) x(i)) from i=1 to n
= Σ x(i)2 from i=1 to n
P=xxT
= \begin{bmatrix}x_{1}\\x_{2}\\x_{3}\\;;\\x_{n}\end{bmatrix}[x_{1}x_{2}x_{3…x_{n}}]
P= x12 + x22+….+ xn2 = l2
Option (a) is the correct answer.
Q.39. The \frac{V_{out}}{V_{in }} of the circuit shown below is ,
a) -\frac{R_{4}}{R_{3}}
b) \frac{R_{4}}{R_{3}}
c) 1+\frac{R_{4}}{R_{3}}
d) 1-\frac{R_{4}}{R_{3}}
Ans. (a)
Explanation :- The given circuit diagram is,
From the fig, A1 is the inverting amplifier and A2 is the non-inverting amplifier,
The first input voltage is given by, V_{01} =\frac{-R_{2}}{R_{1}}V_{in}
The second input voltage is given by,
V_{02} =\left ( 1+\frac{R_{2}}{R_{1}} \right )V_{in}There is third inverting amplifier A3, which is an inverting summing amplifier
V_{out}=\frac{-R_{4}}{R_{3}}V_{01}-\frac{R_{4}}{R_{3}}V_{02}Putting values of V01 and V02
V_{out}=\frac{-R_{4}}{R_{3} }\left [ \frac{R_{2}}{R_{1}}V_{in} +\left ( 1+\frac{R_{2}}{R_{1}} \right )V_{in}\right ] V_{out}=\frac{-R_{4}}{R_{3}}V_{in}The gain is the ratio of output voltage to the input voltage . It is given by,
\frac{V_{out}}{V_{in}}=\frac{-R_{4}}{R_{3}}Therefore, option (a) is the correct answer.
Q.40. In the circuit shown below, D1 and D2 are silicon diodes with cut-in voltage of 0.7 V. VIN and VOUT are input and output voltages in volts. The transfer characteristic is
Ans. (d)
Explanation :- Let us consider three cases,
Case-I :-
V_{\gamma }=0.7 VFor the positive half cycle if input Vin ,
D1 = ON and D2 = OFF
For diode D1 = Vin – 1V > 0.7
Vin > 1.7 V
Vo = Vin – 0.7
Case-II :- For the positive half cycle, if input Vin,
D1 = OFF and D2 = ON
For Diode D2, 1- Vin > 0.7
Vin < 0.3 V
Vo = Vin +0.7
Case-III :- 0.3 V < Vin < 1.7 V
D1= OFF and D2 = OFF
Vo = 1 V
The transfer characteristics will be